849c5069fc
Seven End Turns from ref-turn2.sav on VM140, six control words, whole-state checksum on every post-turn autosave. 53-bit and 64-bit x87 give byte-identical state across all 35,394 leaves, so an x64/SSE port computing in IEEE double has NO double-rounding budget to preserve and floats=bits is free. Two settings do move state, each reproduced on a repeat run: 0x007f (24-bit) Sys[112 "Gamma Cephei"]/Pop2/PopG/PopC 540000000 -> 540000002 0x1a7f (round-up) Flt[34 "Beta Fleet"]/Pos/.[0] and /Pos/.[2], 1 ULP each So the port must hold intermediates at 53 bits and use round-to-nearest -- both SSE defaults, now measured rather than assumed, each with a named regression witness. The briefed triple was under-powered: 0x027f is 53-bit (it differs from 0x127f only in bit 12, infinity control, ignored since the 387) and 0x137f is 64-bit, not a rounding change. Run as written all three come back identical, and that would have "proved" something false on both axes that matter. Evidence the forced word actually held: read-back at each force site plus 38 independent in-pipeline hook samples per run spanning turn phases 4, 6 and 8, all reading the forced value. Mars::Application::Run calls _controlfp(0x50000,0x3070300) at 0x0089f606 every frame, which is 0x127f, so forcing at StrategyClient::EndTurn is wiped before the turn runs; StrategyServer::BeginProcessTurn is the point that works. Also re-confirms the End-Turn determinism oracle on engine cef889e: bb4fd9ac... / 978041ac... unchanged. New tools: verify/fpu-cw/cw_census.py, verify/fpu-cw/trace_bitdiff.py (the latter exists because under a forced 24-bit word the CRT's own %g rendering degrades, so trace text is not a valid comparison surface).
31 lines
1.6 KiB
INI
31 lines
1.6 KiB
INI
# Lane F, x87 precision-sensitivity experiment (verify/results/fpu-cw in the notes repo).
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# 0x1a7f = 53-bit significand, round-toward-+infinity. The genuine rounding-mode change the brief meant by 0x137f.
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#
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# Every shim.cfg.fpu* file is identical except the fpu.force line: the hook set, the trace path
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# and the flush policy are held fixed so the control word is the only variable across runs.
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#
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# x87 control-word fields: bits 0-5 exception masks, bits 8-9 precision control
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# (00 = 24-bit / 10 = 53-bit / 11 = 64-bit significand), bits 10-11 rounding control
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# (00 nearest / 01 down / 10 up / 11 truncate), bit 12 infinity control (ignored since the 387).
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hooks=trace
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hook.Shim::SelfTest::Fill=off
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hook.Mars::GlobalConsts::LoadFile=off
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hook.Game::WeaponDictionary::Init=off
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hook.Game::SectionDictionary::SectionDictionary=off
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hook.Game::StrategyServer::ProcessFleetMovement=off
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hook.Game::TechTree::ProcessResearch=trace
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hook.Game::ServerPlayer::ComputeBudget=trace
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hook.Game::ServerPlayer::OnTechResearched=trace
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hook.Game::ServerSystem::ProcessTurn=trace
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hook.Game::StrategyServer::MoveFleet=trace
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trace.path=C:\SOTS\shim.trace.jsonl
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trace.inline_max=256
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trace.flush=always
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# Forced once at the turn gate (StrategyClient::EndTurn and StrategyServer::BeginProcessTurn),
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# never re-forced inside the pipeline -- re-forcing would guarantee the value is present without
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# proving it ever held.
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fpu.force=0x1a7f
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# Per-tick sampler: logs to shim.log whenever the word MOVES, so the log carries a timeline of
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# the value rather than a single claim made at a single instant.
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fpu.sample_ticks=on
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